Tapered_floating_point

Tapered floating point

Tapered floating point

Variant of floating-point numbers in computers


In computing, tapered floating point (TFP) is a format similar to floating point, but with variable-sized entries for the significand and exponent instead of the fixed-length entries found in normal floating-point formats. In addition to this, tapered floating-point formats provide a fixed-size pointer entry indicating the number of digits in the exponent entry. The number of digits of the significand entry (including the sign) results from the difference of the fixed total length minus the length of the exponent and pointer entries.[1]

Thus numbers with a small exponent, i.e. whose order of magnitude is close to the one of 1, have a higher relative precision than those with a large exponent.

History

The tapered floating-point scheme was first proposed by Robert Morris of Bell Laboratories in 1971,[2] and refined with leveling by Masao Iri and Shouichi Matsui of University of Tokyo in 1981,[3][4][1] and by Hozumi Hamada of Hitachi, Ltd.[5][6][7]

Alan Feldstein of Arizona State University and Peter Turner[8] of Clarkson University described a tapered scheme resembling a conventional floating-point system except for the overflow or underflow conditions.[7]

In 2013, John Gustafson proposed the Unum number system, a variant of tapered floating-point arithmetic with an exact bit added to the representation and some interval interpretation to the non-exact values.[9][10]

See also


References

  1. Zehendner, Eberhard (Summer 2008). "Rechnerarithmetik: Logarithmische Zahlensysteme" (PDF) (Lecture script) (in German). Friedrich-Schiller-Universität Jena. pp. 15–19. Archived (PDF) from the original on 2018-07-09. Retrieved 2018-07-09.
  2. Morris, Sr., Robert H. (December 1971). "Tapered Floating Point: A New Floating-Point Representation". IEEE Transactions on Computers. C-20 (12). IEEE: 1578–1579. doi:10.1109/T-C.1971.223174. ISSN 0018-9340. S2CID 206618406.
  3. Matsui, Shourichi; Iri, Masao (1981-11-05) [January 1981]. "An Overflow/Underflow-Free Floating-Point Representation of Numbers". Journal of Information Processing. 4 (3). Information Processing Society of Japan (IPSJ): 123–133. ISSN 1882-6652. NAID 110002673298 NCID AA00700121. Retrieved 2018-07-09. . Also reprinted in: Swartzlander, Jr., Earl E., ed. (1990). Computer Arithmetic. Vol. II. IEEE Computer Society Press. pp. 357–.
  4. Hamada, Hozumi (June 1983). "URR: Universal representation of real numbers". New Generation Computing. 1 (2): 205–209. doi:10.1007/BF03037427. ISSN 0288-3635. S2CID 12806462. Retrieved 2018-07-09. (NB. The URR representation coincides with Elias delta (δ) coding.)
  5. Hamada, Hozumi (1987-05-18). "A new real number representation and its operation". In Irwin, Mary Jane; Stefanelli, Renato (eds.). 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH). Washington, D.C., USA: IEEE Computer Society Press. pp. 153–157. doi:10.1109/ARITH.1987.6158698. ISBN 0-8186-0774-2. S2CID 15189621.
  6. Hayes, Brian (September–October 2009). "The Higher Arithmetic". American Scientist. 97 (5): 364–368. doi:10.1511/2009.80.364. S2CID 121337883. . Also reprinted in: Hayes, Brian (2017). "Chapter 8: Higher Arithmetic". Foolproof, and Other Mathematical Meditations (1 ed.). The MIT Press. pp. 113–126. ISBN 978-0-26203686-3.
  7. Muller, Jean-Michel (2016-12-12). "Chapter 2.2.6. The Future of Floating Point Arithmetic". Elementary Functions: Algorithms and Implementation (3 ed.). Boston, Massachusetts, USA: Birkhäuser. pp. 29–30. ISBN 978-1-4899-7981-0.

Further reading


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